Engineering & Technology · Manufacturing Processes & Process Selection
Electronics fabrication, microscale processes and packaging
A chip contains many features that are made together across a wafer. Instead of individually cutting every feature with a small tool, engineers can pattern a temporary protective layer and selectively change what lies beneath it. Keeping those layers and steps distinct is the key to understanding the route.
Material Structure & Properties and Engineering Design Methods & Trade-offs supply deformation, properties, requirements and trade-offs. This chapter recalls volume, stress and percentage arithmetic before using them. The last lesson introduces mean and standard deviation in context. All numerical prices, dimensions, shrinkage factors, times, yields, distributions and resource quantities are original teaching assumptions. They are not supplier data, machine settings, qualified procedures or allowable service values.
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Explain a simple layer-patterning sequence and connect microscale fabrication to packaging and yield.
Give each layer a role
A substrate supports the structure. A deposited film may later act as a conductor, insulator or another functional layer. Photoresist is a temporary light-sensitive material used to define selected regions. In the positive-tone example here, exposed resist is made removable during development. Exposure changes the resist; development removes selected resist; etching then removes exposed underlying film. These are distinct transformations.
Our sequence starts with a continuous film, adds resist, exposes a central region, develops an opening, etches through that opening and strips the remaining resist. The final film has a gap. The substrate remains in this deliberately selective idealisation. Real processing must control selectivity: how strongly the intended removal differs from unwanted attack on other materials.
Build a device through compatible repeated steps
Repeating deposition, patterning and removal can create connected layers. Other operations change electrical behaviour, join interfaces or prepare surfaces. The six-panel cross-section is one simplified subtractive pattern transfer, not a complete transistor fabrication route. The illustrated film and resist thicknesses are exaggerated for readability and have no fabrication scale.
Each new pattern must align with existing features. Contamination, incomplete removal, dimensional bias and misplaced patterns can interrupt a connection or bridge neighbouring conductors. A tool’s ability to show a small feature does not establish that a whole repeated process makes reliable devices. Inspect features and relevant electrical behaviour at stages where evidence can identify the source of a problem.
Packaging is an engineered structure
After fabrication and testing, a die must connect into a useful system. Packaging provides electrical paths and supports protection, handling and heat transfer according to the application. Contacts may use wire connections or arrays of small connections; there is no single universal package cross-section. A printed circuit board is a separate level of interconnection, not simply a large silicon chip.
Materials joined in a package may expand differently with temperature. Their constrained movement can stress interfaces, so thermal and mechanical design interact with electrical layout. A low-resistance electrical connection can still have a durability or heat-removal problem. Local material state and actual thermal history matter alongside catalogue bulk properties.
Yield is the fraction meeting defined acceptance criteria at a stated stage. Wafer results, assembly yield and final system tests describe different populations. Preserve stage definitions and traceability; a passing visual pattern or a high stage yield does not guarantee every packaged unit meets its function.
Carry accepted quantities through successive stages
Use a constructed batch of 800 candidate dies. Suppose 90% pass the defined die tests: 800 × 0.90 = 720. If 95% of those then pass assembly and final tests, accepted units are 720 × 0.95 = 684.
Overall yield relative to the original candidates is 684/800 = 85.5%. Multiplication is justified because the second fraction is explicitly conditional on the first-stage survivors. It does not require assuming two unrelated failure mechanisms are independent. If the percentages were estimated probabilities, 684 would be an expected count rather than a guaranteed integer outcome.
For a separate original alignment sketch, two same-layer tracks are 4 μm wide and their centres 10 μm apart, giving a 6 μm edge gap. Moving the second track 1 μm toward the first reduces the gap to 5 μm. This simple geometric change is not a claim about a real process’s resolution or overlay tolerance.
Try the reasoning
Why is development different from etching the underlying film?
Show the answer and reasoning
Development opens selected parts of the resist mask. The later etch transfers that opening into the film in this route.
Why does 90% followed by 95% give 85.5% overall?
Show the answer and reasoning
The 95% applies to the 90% that survived the earlier stage: 0.90 × 0.95 = 0.855.
Why is packaging part of performance rather than just a container?
Show the answer and reasoning
Its electrical, thermal and mechanical connections affect function and durability; material mismatch and interfaces can limit the system.
What to carry forward
Microscale manufacture relies on controlled material changes and aligned patterns. Packaging and stage-by-stage evidence complete the path toward a working system.
References
Teaching resources and research supporting this lesson’s explanations and examples.