Engineering & Technology · Instrumentation, Sensors & Embedded Integration
Embedded interfaces, protocols and hardware-software boundaries
A controller receives two bytes without a communication error and still displays a nonsensical temperature. The wire-level transaction may have succeeded while software used the wrong byte order or scale. Reliable integration checks both the transport and the meaning assigned to its contents.
Use Measurement, Units & Engineering Evidence; Electrical Circuits & Network Behaviour; and Electronics, Signals & Devices. This chapter defines its conversion slopes, timing terms and byte conventions. Force-voltage models, reference pairs, clocks, motor parameters and all plotted data are original constructed teaching inputs. They are not hardware selections, wiring instructions, operating limits or qualified calibration records.
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Separate electrical transport, byte representation and application meaning in an embedded measurement path.
An interface is several agreements
At the physical level, devices need compatible signals, references, timing and loading. A bus protocol defines how data are transferred and which participant acts when. An application contract then defines the register or message meaning: quantity, units, scaling, ordering, signedness and validity. Passing one layer does not prove the others match.
An embedded computer often combines a processor, memory and peripherals that acquire or transmit data. Software configuration determines which channel, reference, range or mode is active. A correct conversion formula applied to the wrong channel remains a wrong measurement. Identify hardware, firmware and configuration versions together rather than recording only a device name.
Use one protocol to see the distinctions
In a conventional I²C transaction, a serial data line and a serial clock coordinate communication. An address identifies the intended target, and the receiver acknowledges transmitted bytes. The selected protocol mode and device documentation still define the electrical and timing limits. Some transfers can wait, so counting nominal clocks is not a worst-case response guarantee.
An acknowledgement establishes a limited transport event. It does not establish that a sensor completed a new conversion, that the application selected the right register or that a commanded physical action occurred. Readiness, validity, identity and freshness may require separate fields or observations. These concepts are independent of whether a bus has a convenient connector.
Read the number before assigning it a physical meaning
Binary uses digits 0 and 1, with successive place weights 1, 2, 4, 8 and so on. Eight bits have 2⁸=256 distinct patterns; as unsigned integers they represent 0 through 255. Hexadecimal is base sixteen: its digits 0–9 have their usual values, and A, B, C, D, E, F stand for 10, 11, 12, 13, 14, 15. The prefix 0x declares this notation; it is not part of a transmitted number or a physical unit. Each next hexadecimal place to the left weighs sixteen times as much. Thus 0xF4=15×16+4=244, and 0x0A=0×16+10=10.
Two hexadecimal digits span 16²=256 patterns, so they can describe one eight-bit byte. For an unsigned high-byte-first two-byte count, each unit in the high byte weighs 256 units in the low byte: count=256×high+low. Most-significant-bit-first transfer within a byte, as in the selected I²C mode, is a separate agreement from which whole data byte arrives first. The bus rule does not by itself define a sensor register’s multi-byte order, signed encoding, scale or invalid-code meanings.
The first address byte has a different job from those data bytes. In the selected seven-bit-address format, seven address bits are followed by a direction bit d: 0 for WRITE and 1 for READ. Appending one low-order binary bit multiplies the address value by two and adds d, so first-byte value=2×address+d. For 0x52, address=5×16+2=82. WRITE gives 164=0xA4; READ gives 165=0xA5. These eight-bit first-byte values are not the original seven-bit address. A software interface may ask for an unpacked address and a separate direction, or for a packed value; its actual contract must say which.
Keep interpretation and recovery explicit
A byte has eight bits. A two-byte unsigned count can place its more significant byte first or last; both endpoints must agree. Negative values need an agreed signed representation. Scale and offset then map a count to a physical quantity. Special invalid codes must be checked before applying that mapping, or a fault marker can become a plausible-looking number.
A result should retain the relevant sample time and status. Sequence numbers can expose missing or repeated records, while an integrity check detects only the error patterns it was designed for. A valid checksum does not establish calibration, correct units or authenticity. Timeouts and restart behavior also need an explicit consequence appropriate to the application; silently reusing an old value changes the evidence.
Decode two bytes and count a limited transaction
The invented payload 0x01, 0xF4 uses hexadecimal notation: 0x01 is 1 and 0xF4 is 244. High byte first gives 1×256+244=500 counts. At .01 °C/count this means 5.00 °C. Reversing the order gives 244×256+1=62465 counts, or 624.65 °C under the same scale. No physical temperature changed.
The figure uses a seven-bit address 0x52 with write direction, followed by those two payload bytes. Three eight-bit bytes plus their acknowledgement clocks require 27 clocks. At a supplied 100 kHz clock this part takes 270 µs. START/STOP timing, waiting, gaps, conversion time and other software activity add to a real transaction.
For a fresh payload under the same declared unsigned/high-byte-first 0.01 °C-per-count contract, take 0x02, 0x0A. Their values are 2 and 10; count=2×256+10=522 and the indication is 5.22 °C. Reversing these bytes instead gives 10×256+2=2562, or 25.62 °C. Both indications could look plausible. Correct byte reception or a checksum alone cannot choose the intended interpretation.
For a separate address exercise, let the seven-bit address be 0x2D=2×16+13=45. Its WRITE first byte is 2×45=90=0x5A; its READ first byte is 91=0x5B. If a stipulated software interface expects the unpacked seven-bit address and handles direction separately, its address argument must be 0x2D, not 0x5B. This arithmetic explains a contract boundary; it does not specify a real device register or a bus implementation.
Try the reasoning
Does an acknowledged byte prove the physical measurement is current?
Show the answer and reasoning
No. Fresh conversion status and sample timing are separate from byte reception.
Why specify byte order as well as units?
Show the answer and reasoning
The same bytes can become different counts before any unit conversion is applied.
Can a checksum establish that the calibration is correct?
Show the answer and reasoning
No. It checks a defined property of transmitted data, not the measurement relationship.
Decode a supplied unsigned high-byte-first payload 0x03, 0x10 at 0.01 °C/count. Does the leading 0x make the result hexadecimal degrees?
Show the answer and reasoning
0x03 is 3 and 0x10 is 1×16+0=16. The count is 3×256+16=784, giving 7.84 °C under the stated scale. 0x only declares how the byte values were written; the application contract supplies the physical units.
A software interface explicitly expects a seven-bit address and a separate READ flag. For address 0x2D, should its address argument be 0x5B because that is the first byte on the wire?
Show the answer and reasoning
No. Pass the stipulated unpacked address 0x2D=45 and READ separately. Packing that value with direction 1 produces 2×45+1=91=0x5B for the wire. Passing the already packed value as an address would apply the wrong representation contract; actual APIs must be checked individually.
What to carry forward
Treat transport success and correct physical interpretation as separate interface checks.
References
Teaching resources and research supporting this lesson’s explanations and examples.
- MT-010 — The Importance of Data Converter Static SpecificationsWalt Kester · Analog DevicesTeaching resource · PDF
- NI-DAQmx Synchronization of PXI Express ModulesNational InstrumentsTeaching resource
- UM10204 I²C-bus specification and user manual, Rev 7.0 (1 October 2021), selected protocol conceptsNXP SemiconductorsTeaching resource · PDF
- SP 800-56C Revision 2, Recommendation for Key-Derivation Methods in Key-Establishment Schemes, selected byte/hexadecimal notation onlyElaine Barker, Lily Chen and Richard Davis · NISTTeaching resource · PDF